SSE4 instruction set

[Mathieu Monnier]

Hi,

Attached is a patch attempting to add SSE4 instruction set support to 
yasm. At the moment, I'm not even sure the opcodes generated are 
correct, I'll only be able to check that during the week. Yet I post the 
patch now, in order to know whether - at least - I did the thing 
properly or not.

I had, prior to today, no knowledge whatsoever on how opcodes where 
generated, nor on yasm source code, so I most probably borked something. 
So you are more than welcome to comment on the patch structure while I 
check its validity.

For those interested, opcodes were found in the document 25366719.pdf ( 
06-09-06 ), that was temporarily hosted on ftp://download.intel.com 
before the next version of the document - 25366720.pdf ( 06-28-06 ) - 
was published. The only difference between the two seems to be the 
opcode removal, but luckily other websites still host the old version.

Regards,

Mathieu Monnier

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