movdqa/movdqu amd64 glitches

[Henryk Richter]

Hi,

I attempted to use the extended xmm8-xmm15 registers for move operations
but yasm generates the wrong instruction byte order.

example:

movdqa  xmm10, xmm1 ; assembles to    44 66 0f 6f d1 (rexX movdqa  
xmm2,xmm1)

while gnu as outputs   66 44 0f 6f d1 correctly.

I didn't find the swapping flag in x86.re, so I'm kindly asking here
for a hint.

regards,
Henryk Richter

___________________________________________
Henryk Richter, Dipl.-Ing.

University of Rostock
Inst. of Communications and Information Electronics
R.-Wagner-Strasse 31
18119 Rostock, Germany

Phone:  +49 - 381 - 4983596
Mobile: +49 - 175 - 1771241
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EMail:  buggs at comlabien.net
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