Wrong code generated for VR/PR operands

[Vivek Mohan]

Hi,
As per the intel/amd manuals the VR/PR operands are XMM/MMX registers 
encoded into the r/m field of the modr/m byte; but the code generated by 
YASM (0.3.0) for instructions such as

- pinsrw   G, PR	example : pinsrw eax, mm1
- movmskps G, VR	example : movmskps eax, xmm1

are such that the G operand is encoded into r/m field and the VR/PR 
operands into reg field. For example, the code generated for

	movmskps eax, xmm1

is,	
	0x0F 0x50 0xC8

which when diassembled gives

	movmskps ecx, xmm0

Vivek
http://sig9.com/